[EXP] Wipro openings in Product Engineering Services

Wipro has been in the Product Engineering space for more than 25 years now and is the world’s largest third party R & D services provider. Product Engineering Services (PES) works with the Engineering and Research departments of many Fortune 500 companies to help them design and develop innovative, high quality, cost effective and safe products. PES also works on complex Industrial Automation Systems, futuristic Defense and Satellite Systems. It is one of the few companies to be “Inside Intel” and helping other top semiconductor companies for new chips and hardware boards.

The Engineering Design Services at Wipro works on safety requirements of Automotives, interiors and control surfaces of Aircrafts, energy optimization of Consumer Durables, thermal environment of Electronic goods among other areas.

We have the following opportunities in Bangalore, Hyderabad, Chennai, Cochin, Pune & Kolkata for our Product Engineering Team.

1. Physical Design Lead
   4-7 years Experience in Synopsys ICC/ BlastFusion / Talus / SoC Encounter / Astro or equivalent, and Blast plan pro / FE Electrical. reliability analysis for variant SoCs, Should have worked on following areas Synthesis, Floorplanning/IO/Package Planning, Place and Route, Timing / Noise / Design Closure.
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2. Device Driver Developer
   2-6 Years Experience and should have worked in kernel development in Linux Environment.
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3. J2EE Lead
   5-8 Years Experience and should have worked on J2EE (EJB/Struts).
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4. STB/DTV Experts
   2-6 Years Experience and Should be strong in C/ C++ with rich knowledge in STB/ DTV domain.
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5. Product Design Engineer - Mechanical
   2-6 Years Experience in Value Engineering with Catia V5 / UG / Pro-E / Solidworks / Solid Edge with Automotive / Appliances / Turbo Machinery / Shipping & Locomotive domain.
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6. Engineering IT - Tech Lead
   6-11 Years Experience in FORTRAN, C/C++/C#, Visual Studio, .NET, CAD API like NX/Open, CAA / RADE. 3D/2D graphics application.
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7. ASIC Verification Lead
   4-8 Years Experience in IP verification/ SoC level verification, Defining the test strategy and test environment for IP/SoC level verification, creation of test environment, test plan and testcases, Testcase execution, simulation, debugging and coverage analysis, experience in using C / Specman / System Verilog for verification and Verilog/VHDL coding. Scripting languages like Perl/Shell scripting.
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8. ASIC Designer/Lead ASIC Designer
   2-7 Years experience in RTL design using Verilog / VHDL. Should have worked in complex IP design / SoC RTL integration involving glue logic development, Synthesis, doing quality checks on RTL and debugging of issues. Should possess good hands-on knowledge in the usage of tools like VCS/Modelsim, Design compiler, Formality/Verplex, Spyglass.
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9. Physical Design Engineer
   2-4 Years Experience in Synopsys ICC/ BlastFusion / Talus / SoC Encounter / Astro or equivalent, and Blast plan pro / FE Electrical. reliability analysis for variant SoCs, Should have worked on following areas Synthesis, Floorplanning/IO/Package Planning, Place and Route, Timing / Noise / Design Closure.
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10. VLSI DFT Engineer
    2-4 Years Experience in JTAG basics , IEEE compliance standards, boundary scan insertion and verification. handling module level scan insertion. [Mentor - BSD Architect,Synopsys - BSD Compiler]
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11. QT Developers
    2-6 Years Strong Experience in C, C++ and QT.
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12. J2EE Architect
    6-10 Years Experience J2EE Architect ( should have worked in Core Java, Preferred to have experts worked on system side projects than on applicattion developers)
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13. STB/DTV Architects
    7-10 Years Experience and Should be strong in C/ C++ with rich knowledge in STB/ DTV domain. Should be able to design project work flow and Analyse the technical comprehension.
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14. Finite Element Analyst
    2-6 Years Experience in Hypermesh or ANSA. Crash Analysis using LS-Dyna / PamCrash, NVH analysis using Nastran and Structural analysis using Abaqus. FMVSS / ECE
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15. Flash Light Developer
    3-6 Years Experience in Flashlight Development on Embedded Platform with Exposure to stagecraft
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16. ASIC Verification Expert
    2-5 Years ASIC Verification experience in Networking Domain, Specman base verification, developed test environment in network protocol, Specman, Verilog, VHDL and assembly language.
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17. Static Timing Analysis Expert
    2-4 Years Experience in Static Timing Analysis, Worked on timing closure, Sound understanding of constraints and closure of blocks (post Layout STA).
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