Skill
| Requirement (JD)
|
CAE Analyst - Body
NVH
| CAE Analyst - Body NVH
(4+yrs)BE/Mtech/MS in Mechanical/Automobile Engineering
experience in Vehicle acoustic analysis
Experience in working with body NVH
Good Hands on experience in CAE tools like Nastran, Hyperworks
Excellent simulation and analysis skills
Strong in fundamentals of NVH
Good Understanding of vehicle structure and structure toplogy Design.
Good communication skills(written/oral)
Have good experience in leading the team and understanding the client requirements
|
CAE Analyst – Durability
| CAE Analyst – Durability
(4+yrs)BE/Mtech/MS in Mechanical/Automobile Engineering
Experience in Durability analysis
Good Hands on experience in CAE tools like Abaqus, Nastran, Hyperworks
Exposure to the Fatigue tools like N-code and FEMFAT is an additional advantage
Strong in fundamentals of Durability
Good Understanding of vehicle structure and structure toplogy Design.
Good communication skills(written/oral)
Have good experience in leading the team and understanding the client requirements
|
Informatica Developer
| Informatica Developer(4+yrs)-Informatica
Development Experience
|
Informatica Lead
| Informatica Lead (6+yrs)
Informatica Development and lead experience.
|
Datawarehousing Project
Manager
| Datawarehousing project
Manager(10+yrs) Datawarehousing experience
|
OBIEE Developer
| OBIEE Developer (4+yrs)OBIEE
Development experience.
|
Oracle with Sybase
| Oracle with Sybase(4+yrs)
Oracle with Sybase Development Experience.
|
System Architect
| System Architect (9-15yrs)
System Architect TD-LTE-A:
Definition and design of Layer 1 & Protocol for the TD-LTE-A
wireless standard.
- Architecture definition for TD-LTE-A Solution for Mobiles and eNodeB
- Mapping of TD-LTE-A features and standard requirements to Firmware, algorithm
and protocol stack requirements
- Breakdown of requirements into Firmware & stack components
- Identify all relevant FW aspects for the TD-LTE-A standard
- Define scheduling and task priorities of Firmware & stack components
with respect to given real-time constraints and system resources (MIPS,
memory) in a TD-LTE-A eNodeB system
- Multicore architecture ,Concepts for partitioning between Hardware
and Firmware (HW/FW split) in a TD-LTEsystem
- Verification concepts for TD-LTE-A FW on block and system level
- Scheduling software architecture and implementation
- Provide guidelines for implementation aspects of modem algorithms in
a TD-LTE system
- Customer interface/Abstraction for TD-LTE-A FW related modules
- In-depth Knowledge of 3GPP standards like LTE-A, GSM/EDGE, W-CDMA, HSPA,
TD-SCDMA, CDMA 1x/EvDO etc required.
- Hands-on Experience on OEM Hardware platform is essential.
|
Firmware Architect
| Firmware Architect (9
– 15 yrs)
FIRMWARE (DSP, FPGA, ASIC) & Protocol Architect TD-LTE-A:
- Definition and design of Layer 1 Firmware for the TD-LTE-A wireless standard
- Architecture definition for LTE DSP & FPGA firmware
- Mapping of given LTE-A features and algorithms to DSP & FPGA FW requirements
- Define scheduling and task priorities of Firmware components with respect
to given real-time constraints and system resources (MIPS, memory) in a
TD-LTE system
- Breakdown of requirements into FW components
- Identify all relevant FW aspects in a LTE-A eNodeB wireless system
- Define scheduling and task priorities of FW components with respect to
given real-time constraints and system resources (MIPS, memory) in a TD-LTE-A
eNodeBs system
- Concepts for partitioning between HW and FW (HW/FW split)
- Customer interface/Abstraction for TD-LTE-A FW related modules
- Interface definition of HW accelerator blocks for selected DSP tasks
- Planning and selection of scheduling software for real-time operation
in a LTE-A system
- Verification concepts for DSP FW on block and system level
- Provide guidelines for implementation aspects of modem algorithms
- Support definition and design of HW accelerator blocks for selected DSP
tasks
- Definition and design of DSP Firmware for LTE-A TDD (GSM, GPRS, EDGE,
EDGE Evolution) & 3G (UMTS, TD-SCDMA, CDMA 1x, HSPA) wireless baseband
applications required.
- In-depth Knowledge of 3GPP standards like LTE-A, GSM/EDGE, W-CDMA, HSPA,
TD-SCDMA, CDMA 1x/EvDO etc required.
- Hands-on Experience on OEM Hardware platform is essential.
|
Lead Developer
| Lead Developer (5 – 8yrs)
FIRMWARE (DSP, FPGA, ASIC) & Protocol Stack Lead TD-LTE-A:
- Definition and design of Layer 1 Firmware & Protocol Stack for the
TD-LTE wireless standard
- Mapping of given LTE features and algorithms to DSP & FPGA FW requirements
- Define scheduling and task priorities of Firmware & Stack components
with respect to given real-time constraints and system resources (MIPS,
memory) in a TDD LTE-A system
- Breakdown of requirements into FW components & Stack components
- Identify all relevant FW aspects in a LTE-A/Multi-mode eNodeB wireless
system
- Define scheduling and task priorities of FW components & Protocol
Stack with respect to given real-time constraints and system resources
(MIPS, memory) in a LTE-A eNodeB system
- Multicore architecture ,Concepts for partitioning between HW and FW (HW/FW
split).
- Concepts for partitioning of Protocol stack funtions between ARM and
HW Accelerators
- Customer interface/Abstraction for TDD LTE-A FW related modules
- Interface definition of HW accelerator blocks for selected DSP tasks
- Scheduling software for real-time operation in a LTE-A system
- Verification concepts for DSP FW on block and system level
- Provide guidelines for implementation aspects of modem algorithms
- Support definition and design of HW accelerator blocks for selected DSP
tasks
- In-depth Knowledge of 3GPP standards like LTE,GSM/EDGE, W-CDMA, HSPA,
TD-SCDMA, CDMA 1x/EvDO etc required.
- Hands-on Experience on OEM Hardware platform is essential.
|
Developer
| Developer (3 – 5yrs)
FIRMWARE (DSP, FPGA, ASIC) & Protocol Stack engrs for TD-LTE-A:
- Definition and design of Layer 1 Firmware for the TD-LTE-A wireless standard
- Mapping of given LTE features and algorithms to DSP & FPGA FW requirements
- Define scheduling and task priorities of Firmware components with respect
to given real-time constraints and system resources (MIPS, memory) in a
TD-LTE-A system
- Breakdown of requirements into FW components
- Identify all relevant FW aspects in a LTE-A eNodeB wireless system
- Concepts for partitioning between HW and FW (HW/FW split)
- Concepts for partitioning of Protocol stack funtions between ARM and
HW Accelerators
- Interface definition of HW accelerator blocks for selected DSP tasks
- Scheduling software for real-time operation in a LTE-A eNodeB system
- Verification concepts for DSP FW on block and system level
- Provide guidelines for implementation aspects of modem algorithms
- Support definition and design of HW accelerator blocks for selected DSP
tasks
- In-depth Knowledge of 3GPP standards like LTE-A, GSM/EDGE, W-CDMA, HSPA,
TD-SCDMA, CDMA 1x/EvDO etc required.
- Hands-on Experience on OEM Hardware platform is essential.
- Hands on experience of version management tools like clearcase is desirable |
|